Please use this identifier to cite or link to this item:
http://rguir.inflibnet.ac.in:8080/jspui/handle/123456789/15667| Title: | Digital Design Verilog HDL and Fundamentals |
| Authors: | Cavanagh, Joseph |
| Keywords: | Number Systems, Number Representation Minimization of Switching Functions |
| Issue Date: | 2008 |
| Publisher: | Taylor and Francis Group |
| URI: | http://rguir.inflibnet.ac.in:8080/jspui/handle/123456789/15667 |
| ISBN: | 978-1-4200-7416-1 |
| Appears in Collections: | Electronics and Communication Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Digital Design and Verilog HDL Fundamentals.pdf Restricted Access | 10.3 MB | Adobe PDF | View/Open Request a copy |
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