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Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cavanagh, Joseph | - |
dc.date.accessioned | 2023-01-10T05:25:53Z | - |
dc.date.available | 2023-01-10T05:25:53Z | - |
dc.date.issued | 2008 | - |
dc.identifier.isbn | 978-1-4200-7416-1 | - |
dc.identifier.uri | http://rguir.inflibnet.ac.in:8080/jspui/handle/123456789/15667 | - |
dc.language.iso | en | en_US |
dc.publisher | Taylor and Francis Group | en_US |
dc.subject | Number Systems, Number Representation | en_US |
dc.subject | Minimization of Switching Functions | en_US |
dc.title | Digital Design Verilog HDL and Fundamentals | en_US |
dc.type | Book | en_US |
Appears in Collections: | Electronics and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Digital Design and Verilog HDL Fundamentals.pdf Restricted Access | 10.3 MB | Adobe PDF | View/Open Request a copy |
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